PCIe has been around since 2004. It’s a high-speed serial computer expansion bus specification that replaces older PCI and PCI-X standards. PCIe currently supports the Generation 4 specification. In ...

Races, missed next-state values due to long paths, and metastability can result from corrupted clock signals. This post describes the challenges of clock network and clock jitter analysis in more ...

Nuclear clocks are the next big thing in ultra-precise timekeeping. Recent publications in the journal Nature propose a new method and new technology to build the clocks. Timekeeping has become more ...

first half wave and a second half wave representing the received RF signal.

Among many deliberations when designing with high-speed analog-to-digital converters (ADCs), the effect of the ADC’s sampling clock is paramount to meeting specific design requirements. There are ...

Occasionally you might need a simple clock module for various projects. A small CMOS clock module, such as the one presented here, is not capable of offering as much precision as a clock module built ...

The importance of timing requirements and jitter budgets for FPGAs, ASICs, and SoCs. How to utilize the information portrayed in a clock tree to choose the most well-suited clock generator for your ...