Nature

Scaling up and down of 3-D floating-point data in quantum computation

In the past few decades, quantum computation has become increasingly attractive due to its remarkable performance. Quantum image scaling is considered a common geometric transformation in quantum ...
Nature

Efficient computation and design of high speed double precision Vedic multiplier architecture

Digital Signal Processing (DSP) is the basis for many modern technological applications, including mobile communications, radar, imaging for health care, and multi-media devices that process audio and ...
Semiconductor Engineering

AI Chips Must Get The Floating-Point Math Right

Most AI chips and hardware accelerators that power machine learning (ML) and deep learning (DL) applications include floating-point units (FPUs). Algorithms used in neural networks today are often ...
Hackaday

Using Integer Addition To Approximate Float Multiplication

Once the domain of esoteric scientific and business computing, floating point calculations are now practically everywhere. From video games to large language models and kin, it would seem that a ...
EDN

Targeting Floating-Point Algorithms for FPGA or ASIC Deployment

Native Floating-Point HDL code generation allows you to generate VHDL or Verilog for floating-point implementation in hardware without the effort of fixed-point conversion. Native Floating-Point HDL ...
Design-Reuse

How to Reduce FPGA Logic Cell Usage by >x5 for Floating-Point FFTs

Here we provide rational for using Centar’s floating-point IP core for the new Altera Arria 10 and Stratix 10 FPGA platforms. After a short contextual discussion section, a comparison of various FFT ...